1. Technical Field
This invention relates to semiconductor passivation techniques and, more particularly, to passivation of semiconductors used for infrared detector arrays.
2. Background
Dielectric layers of oxides and nitrides have commonly been used for semiconductor surface passivation. One particular class of devices where passivation is required is infrared detector arrays employing a plurality of p-n junctions or diodes whose electrical characteristics vary as a function of incident radiation flux. Infrared detectors capable of being used in surveillance and target seeking purposes as well as search and tracking imaging systems need to sense the presence of electromagnetic radiation having wavelengths in the range of about 1-30 microns. While several materials can be used to sense infrared radiation at these wavelengths, indium antimonide has been found to be quite promising for the 3-5 micron band. Unfortunately, the known techniques for indium antimonide (InSb) surface passivation have not been entirely satisfactory. Various oxides or nitrides including the conventional anodic oxides (In.sub.2 O.sub.3 +Sb.sub.2 O.sub.3), SiO, SiO.sub.x, SiO.sub.2, SiO.sub.x N.sub.y, Si.sub.3 N.sub.4, etc. have been used for InSb surface passivation. However, due to either a deviation from the zero flatband voltage or poor insulating properties, they generally could not be used by themselves for passivating a InSb diode surface. In order to achieve good detector performance, gated structures are normally required for the above oxides or nitrides for passivation. The use of these gated structures, however, have their drawbacks. One major problem is their gate bias instability. In addition, extreme care must be taken during processing and testing of these structures. Also, for FPA (focal plane array) manufacturing, very cumbersome assembling and testing procedures are usually required.